Examination
of a Complete Summoner carried out with doors OR Exclusive and NAND |
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Created it, 06/10/19
Update it, 06/10/30
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4. - THIRD EXPERIMENT : EXAMINATION OF A COMPLETE SUMMONER
A complete summoner takes account of the reserve of the circuit preceding summoner and of course generates reserve for the following circuit.
He thus has three entries and two exits as represented with the figure 7-a.
The table of the addition with reserve located at the figure 7-b corresponds in practice to that obtained when one adds between them three binary numbers of 1 bit, of which one is the reserve of the preceding partial sum.
Let us examine, for example, the three following sums :
4. 1. - REALIZATION OF THE CIRCUIT
a) Leave in place on the matrix the integrated circuits MM 74C86 and MM 74C08 and remove all the connections.
b) Insert the integrated circuit MM 74C32 on the matrix in the position indicated to the figure 8-a and carry out the corresponding connections.
The electric diagram of the circuit is given to the figure 8-b.
4. 2. - OPERATIONAL TEST
a) Put Digilab under tension.
b) Test the various combinations of three switches SW0, SW1 and SW2 and check with each time the circuit carries out the function well summons according to the table of the figure 7-b.
For example, with SW0 on position 0, SW1 out of 1 and SW2 out of 1, L0 will have to be extinct and L1 lit. This situation corresponds to : 0 + 1 + 1 = 10.
c) the experiment being finished, put not under tension Digilab. In short, with the examined circuit, it is possible to add three numbers of 1 bit. When the sum and reserve are worth 1, one obtains the maximum result 11 equivalent with the decimal number 3.
In the next experiments, you will see how with only one complete summoner associated other circuits, one can add with the numbers as large as one wants.
5. - FOURTH EXPERIMENT : EXAMINATION OF A COMPLETE SUMMONER
CARRIED OUT WITH DOORS OR EXCLUSIVE AND NAND
You will now try out a circuit which carries out the same functions as the circuit of the third experiment but which however uses an integrated circuit of less.
The complete summoner is called in English full adder.
5. 1. - REALIZATION OF THE CIRCUIT
a) Remove matrix the connections and integrated circuits relating to the preceding experiment except for MM 74C86.
b) Insert on the matrix the integrated circuit MM 74C00 (quadruple NAND) and to carry out the connections indicated to the figure 9-a.
The electric diagram of the circuit carried out is given to the figure 9-b.
5. 2. - OPERATIONAL TEST
a) Energize Digilab.
b) Test the various combinations of three switches SW0, SW1 and SW2 and check with each time the circuit functions like a complete summoner.
c) the tests being finished, put not under tension Digilab.
If you compare the circuit tested here with that of the preceding experiment, you notice that this second circuit, while being different and using a smaller number of integrated circuits, fulfills the same function.
When one must fulfill a switching function, it is important to minimize the number of integrated circuits even if that involves the need for employing more complex integrated circuits.
In the second part of this practice, you will have the occasion of you to give an account of it by using the multiplexers.
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