|Components with exits 3 States (TRI-STATE)||Bidirectional buffer|
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In this practice, we will examine the memories. They have a great importance in numerical electronics and are very much used in the microprocessor-based systems.
In the preceding experiments, you already used different components to memorize data. Simplest is the rocker which makes it possible to record only one bit; an example was given in practice preceding in which a rocker was used to preserve reserve.
Since a rocker can memorize one bit, when it is used like memory, one says that it has a capacity of 1 bit.
The registers with shifts examined previously make it possible to record a series of bits of which the number depends on the number of stages.
The rockers are also used as dividers, parallel serial converters or parallel-series, or like elements of counting.
There are on the other hand components only used to preserve data and which, consequently, take the name of memories.
In the exercises envisaged in this practice, you will try out a memory allowing to memorize several thousands of bits.
You know that there are many types of memories, different between them according to the use for which they are intended. All are characterized by their capacity defined by the number of bits which they can contain, by their access time (time necessary to read or write information).
There are moreover memories of the type RAM (Random Access Memories) or random access memories, ROM (Read Only Memories) or memories authorizing only the reading, PROM (Programmable Read Only Memories) or programmable memories with reading authorized only, the EPROM or UVPROM programmable with only authorized reading, erasable memories by ultraviolet, EAROM or memories PROM erasable electrically.
These memories can be of type static or dynamic and lose information in the absence of food (volatile memories) or preserve it (permanent memories).
We will not be able to try out each category of memories ; the EPROM for example, require special equipment to be programmed ; the dynamic storages must be generated by circuits known as of “cooling” rather complex.
We will use for our experiments a static storage whose capacity is 2 kilobytes is 2 x 8 x 1024 = 16 384 bits exactly.
With this memory, you will use two other integrated circuits ; a meter on twelve floors and a bidirectional buffer TRI-STATE. Since this last component is very new, before practically checking its operation, it is advisable to study it as a preliminary.
1. - COMPONENTS WITH EXITS THREE STATES (TRI-STATE)
Figure 1 represents an example of connections carried out between five components exchanging the data between them.
The arrow indicates on the diagram the direction of information (transmitting or receiving).
We can see on this figure the complexity and the anarchistic structure of the assembly. Indeed, the number of the drivers of connections grows quickly with the complexity of the circuit. As you can notice it in figure 1, we have needs for 20 drivers for five components.
In general, for a number n of components, one needs a number of connections N = n (n-1).
It results from it that the number of drivers grows with the increase in the component count what increases the cost of the systems in an unacceptable way.
This problem is typical memories of microcomputers in which one uses many cases of memories integrated in order to have an important memory.
Each circuit of memory contains part of the data which are used for the microcomputer and it is necessary to be able “to read” or “to write” these data in a memory independently of the others memories. Usually, it is the central processing unit of calculation, i.e. the essential element of the microcomputer which uses these cases reports and must thus communicate with each one of them.
In this case, the connection between the central processing unit and each circuit of memory requires for the reasons explained previously an excessive number of drivers.
This is why, in order to reduce the number of connections, it was imagined another system using only one connection to put in communication between them all the components (figure 2).
Each circuit of memory which arises at this common trunk of connection with the central processing unit can transmit and receive data of the one of the other circuits; this line is generally called in bus English (figure 3).
On this line, several circuits of memory cannot transmit data simultaneously ; if several circuits sought to do it, there would be mixture of information what would make them not exploitable by the receiving circuit. On the other hand, several circuits of memory can receive and use the data transmitted by a single transmitter.
Let us see that it is the technique used to arrive to this result. We will suppose for the convenience of our study which we want to take with a single driver the levels provided by two reversers.
If one carried out simply connection in parallel of the two exits, as one sees it in figure 4, at exit one could not obtain no useful signal. Indeed, if the exit of reverser A is to 1, and the exit of the reverser B to 0 for example, the state will be 0 in TTL, and unspecified but generally taken into account like one 1 (4 V for a food 5 V) in technology MOS.
We saw in the digital theory 11 how a multiplexer makes it possible to transmit signals resulting from several sources through only one line (figure 5).
However, there are called particular components TRI-STATE, with which it is possible to obtain the same result as with a multiplexer. These components have the effect of having in addition to a low state and a high state, a state known as “high impedance”.
The figure 6-a presents the symbol of a circuit of this type : it is about a buffer reverser TRI-STATE which, in addition to traditional the entry and left, comprises an entry of validation located in the figure 6-a by the letter E, initial of the English word ENABLE which means precisely valid.
When the level of the entry E is high, the component behaves like a normal reverser, i.e. its exit always gives a level complementary to that which is applied to its entry.
On the other hand, when the level of E is low, the exit is put at the state called “high impedance”.
Under these conditions, the circuit behaves as if its exit were connected to the point medium of a dividing bridge made up of two resistances of very strong values as that is represented schematically with the figure 6-b.
In practice, when the exit of the buffer reverser is with the state “high impedance” this one is virtually isolated with respect to the mass and from the supply voltage.
By using buffers reversers of the type TRI-STATE, it is possible to achieve the goal that we had fixed ourselves previously, namely, to connect the two exits between them as represented figure 4 ; it is enough, indeed, that one of the two reversers is with the state “high impedance” to be able to read the level available at exit of other reverser TRI-STATE.
While thus proceeding, the signals delivered by each TRI-STATE cannot be superimposed nor to be influenced mutually (figure 7).
From the structure point of view, a component with exit three states is not more complex than a traditional component.
Figure 8 represents the general diagram of the circuit making it possible to transform a standard circuit CMOS into a circuit of the type TRI-STATE.
As we can see it, it includes/understands simply two transistors MOS connected in series at the two boundaries of food (more and masses).
When the entry of validation E is carried on the bottom grade, two transistors MOS are blocked. They behave then like resistances of extremely high values (ROFF = 1012 MW) and circuit CMOS is consequently isolated from the food and thus isolated from the other circuits.
One finds in the trade, in addition to the above mentioned buffers, of the doors, the rockers, the registers, the decoders and the multiplexers having a third state high impedance.
In figure 9, one can see the general diagram of a reverser TRI-STATE of the type CMOS.
For the components of technology T.T.L., the configuration of the TRI-STATE is different from that of circuits MOS.
Figure 10 represents the electric diagram of a door NAND T.T.L. TRI-STATE.
The part of the circuit marked blue color is that which, added to the circuit of traditional door NAND, transforms it into door in three states.
When the entry of validation E is at the high level, the exit of the door puts at the state high impedance, while when E is on the bottom grade, it functions normally.
It is very easy with TRI-STATE to constitute circuits around bus lines, it is enough indeed, that all the circuits having access to the bus are of type TRI-STATE.
By validating them at the good time, one makes so that one only transmits at the same time and that the other circuits are with the state “high impedance” (figure 11).
So on the other hand, the components used are not of type TRI-STATE, it is necessary to interpose between-them and the bus, of the buffers of the type TRI-STATE.
1. 1. - BIDIRECTIONAL BUFFER
When the exit of a circuit must order a high number of other circuits, the useful output of the control signal can be insufficient to guarantee a correct transmission of the data. This problem can be solved while intercalating between the exit of the control circuit and the entries of the ordered circuits a buffer which makes it possible to amplify the power of the control signal.
If the buffer is connected to the bus, one calls this circuit “pilot circuit of bus” or in English «BUS DRIVER» (figure 12).
However, it also happens that a transmitting circuit of the data must also receive some, as we previously saw in the example of figure 3.
It is thus necessary that the “driver of bus” authorizes the passage of information in the two directions. One uses components then containing two buffers of the type TRI-STATE connected as indicated figure 13-a.
When the entry D (initial of direction) is on a bottom grade, the first buffer is validated and second is “high impedance”, the signal can then be conveyed in the from top to bottom direction.
When on the other hand the entry D is on a high level, the situation is reversed : buffer 1 is “high impedance”, and buffer 2 is validated ; the signal can be conveyed upwards.
Because of this characteristic, one calls this type of buffer: “bidirectional buffer” or “driver of bidirectional bus” or “transceiver”, term formed by the contraction of the English expression : transmitter-receiver (émetteur-récepteur).
Sometimes one uses for this circuit the graphic symbol represented figure 13-b.
After this theoretical explanation, you can prepare the material and carry out the first exercise during which you will practically check the operation of bidirectional buffer TRI-STATE.
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