Second experiment :
Examination of a NOR-circuit |
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Created it, 06/10/19
Update it, 06/10/23
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3. - FIRST EXPERIMENT : EXAMINATION OF A CIRCUIT OR
With the following exercise, you will be able to check the operation of a circuit OR and to draw up of it the table of operation as well as the truth table.
For that, you will use the integrated circuit MM 74C32 whose electric diagram is represented figure 5. As you can see it, this integrated circuit includes/understands 4 circuits OR. The experiment relates to the examination of the first circuit OR whose entries are connected to pins 1 and 2 and the exit with pin 3.
The 3 other circuits OR contents in the integrated circuit show the same operating features as you will be able to check it yourself if you wish it by repeating the same tests.
To make this experiment, you conform to the following instructions and refer you with the figure 6-a.
a) Remove group of connectors all the connections possibly present relating to the preceding tests.
b) You ensure that the pile of food is disconnected, take then the integrated circuit MM 74C32 and introduce it into support ICX after having rectified the legs of them so necessary, with the precautions of use recommended in the preceding practices.
c) While serving to you as two pieces of wire of 5 cm duly prepared, connect pin 1 of the integrated circuit with contact SW0 and pin 2 with contact SW1.
d) By using the piece of wire of 10 cm, connect leg 3 of the integrated circuit with the L0 contact.
With these connections, entry 1 of the circuit OR is connected to the common contact of switch SW0 while entry 2 is connected to the common contact of switch SW1 ; the exit of the circuit OR is connected to the L0 indicator.
The two switches make it possible to connect the two entries to the mass (0 V, bottom grade L) or to the positive tension of food (+ 4,5 V, level H), according to whether they are positioned respectively on 0 or of course 1.
e) Put the two switches on position 0 ; the two entries of the circuit OR are thus both connected to the mass, and are thus on the level L. In this way, you carried out the circuit schematized in the figure 6-b (first test).
Feed now the circuit by connecting the cords red and black to the pile and observe the LED L0 ; it is extinct, which indicates a level L.
With this test, you noted that in a circuit OR, when the two entries are on a bottom grade (with the state L), the exit is also on a bottom grade (with the state L).
You can thus draw up a table with two columns, the first reserved on the levels of the entries and the other relating one to the level of the exit.
On this table, you can defer the result of the first test and thus note L for entry 1, L for entry 2 and L for the exit thus supplementing the first line of the table of operation of the circuit OR.
f) Now make upwards rock switch SW1 on position 1.
Entry 2 of the circuit OR is thus carried on the level H. By observing the LED L0, you note that it is lit what indicates that the exit of the circuit OR is on the level H (high).
You can thus defer in the second line of the table of operation the following notes : L for entry 1, H for entry 2 and H for the exit.
g) Make rock switch SW0 on position 1 and bring back switch SW1 on position 0.
Under these conditions, entry 1 was carried on the level H while entry 2 was brought back to the level L.
By observing the LED L0, you note that it is always lit, obvious sign that the exit is still with the state H.
On the basis of this test, you can fill the third line of the table of operation by indicating to it that for the levels H and L of entry, the exit is with the state H.
Again bring back SW1 on position 1
; under these conditions the two entries are on a level H.
By observing the LED L0, you note that it is lit what indicates that the exit is it also on the level H.
From this result, you can register the last line of the table of operation of the circuit OR (represented figure 7-a) by putting H at the two entries like at the exit.
You can pass from the table of operation to the truth table by replacing the letter L by symbol 0 and the letter H by symbol 1, according to positive logical convention. You will obtain the deferred table thus figure 7-b.
According to the table of operation of the figure 7-a, we can deduce that the exit from a circuit OR is in a high state when at least one of its entries is in a high state, while the exit is with the state L (low) only when its entries are with the state L (low).
4. - SECOND
EXPERIMENT : EXAMINATION OF A NOR-CIRCUIT
The goal of this experiment is to note that a NOR-circuit is equivalent to a circuit OR follow-up of a reverser.
For this exercise, you will use the integrated circuit MM 74C02 containing 4 NOR-circuits as you can see it on the electric diagram of figure 8.
As usual, the operational test will be carried out on the first NOR-circuit, i.e. that whose entries are pins 2 and 3 and the exit pin 1.
Proceed in the following way :
a) You ensure initially that the food is well disconnected and remove the connections carried out during preceding tests.
b) Remove the integrated circuit MM 74C32 of the support and introduce in its place the integrated circuit MM 74C02.
c) With the three pieces of wire used in the preceding experiment, connect between them the points indicated below and represented figure 9-a :
stitch 1 of the integrated circuit MM 74C02 and L0 contact,
stitch 2 of the integrated circuit MM 74C02 and contact SW0,
stitch 3 of the integrated circuit MM 74C02 and contact SW1.
d) Put two switches SW0 and SW1 on position 0.
Under these conditions, the two entries of the NOR-circuit are both on the level L and you carried out the circuit represented figure 9-b (first test).
Feed the circuit now and observe the LED L0 : it is lit. That means that, when the entries of the NOR-circuit are with the state LL, i.e. both on a bottom grade, the exit is with the state H (high).
e) Put switch SW1 on position 1, then again put it on position 0 and place SW0 on position 1. You thus carry out two combinations LH and HL on the entries. You note that in both cases, the LED L0 remains extinct indicating that the exit is with the state L.
f) Put finally two switches SW0 and SW1 on position 1. In this case also, the LED L0 remains extinct indicating that the exit is still with the state L.
The results of these tests are summarized in the illustrated table of operation figure 10-a, while the figure 10-b represents the corresponding truth table.
Thanks to the table of operation of the figure 10-a, we can note that the exit of a NOR-circuit is on a level high only if its two entries are each one on the level L (low). If only one of the two entries where both are at the high level, the exit is on the level L (low).
By comparing the truth table of the NOR-circuit (figure 10-b) with that of the circuit OR deferred in the figure 7-b, you will notice that the first can be drawn from the second by a simple inversion, by replacing each 0 by 1 and each 1 by one 0 in the column of exit.
It is advisable for this point to make an important remark.
In the development of the truth table, it was refers, until now, with positive logical convention, i.e. the truth table was drawn from that of operation by associating the logical value 1 the level H and the logical value 0 on the level L.
Let us see now what arrives when one operates according to negative convention logical, i.e. if the logical value 1 is associated the level L and the logical value 0 on the level H, in the case of the NOR-circuit considered previously. The result obtained will be the new truth table represented figure 11.
By comparing this table with the truth table of circuit NAND drawn from the preceding theory (See electronic Digital, 3rd lesson), you will be able to note that they are identical. We can conclude from it that a NOR-circuit functioning in negative logic is equivalent to a circuit NAND functioning in positive logic.
It is thus very important to recall you what follows :
The table of operation of an integrated circuit described physical operation in terms of levels of tension.
The truth table describes the switching function on the other hand that it can achieve, and who can be different according to whether adopted logic is positive or negative. To look further into the question, you will find fuller explanations in Digital the Électroniques theories (not to be neglected).
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