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Monolithic
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Created it, 06/03/17
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3. 4. - MONOLITHIC INTEGRATED CIRCUITS
The monolithic qualifier means of only one block, i.e. the passive and active components all are carried out during same operations on the same substrate.
These circuits are founded on two technologies, one with bipolar transistors, the other with transistors MOS.
Then, we find two destinations, one for the digital circuits, the other for the linear or analogical circuits.
A third heading allows the classification of these circuits, it is the level of integration or, in other words, the density of components or operators per unit of area (let us say per square millimetre).
This classification is not very strict still and depends sometimes on the manufacturers. It allows however, for the observer, to note the formidable evolution in this field.
There are three levels which are :
The S.S.I. (Shorts
Integration) or integration on weak scale, which corresponds to the
first circuits and whose integration related to ten
logical operators or doors.
The M.S.I. (Medium
Scale Integration) or medium-scale integration, for which the level
can reach 100 logical doors.
The L.S.I. (Broad
Scale Integration), large-scale integration, which relates to an
integration of more than 100 logical doors.
One also speaks about V.L.S.I. and S.L.S.I. (Broad Very Scale Integration and Supra Broad Scale Integration). It is about integration of more than 10 000, even more than 50 000 transistors on the same chip. To a little better locate the problem, it should be known that the microprocessors are located in the L.S.I.
Figure 14 represents the various orientations which lead to the classification of a monolithic integrated circuit.
3. 4. 1. - MONOLITHIC INTEGRATED CIRCUITS IN BIPOLAR
TECHNOLOGY
The realization of these circuits comprises three great stages which are :
the realization of the masks
collective operations
the individualization and assembly of the circuit
Starting from a function to be realized, digital circuit or analogical circuit, one prepares an electric diagram.
This diagram, one will draw the drawings corresponding to the various masks to realize.
One carries out then the operations known as collective which use the above mentioned masks and which apply to the process DOUBLE DIFFUSION. There is the different one for the realization of the circuits, but they rise more or less from this last.
Lastly, the circuits are cut out and individualized then gone up on base plate with connections, encapsulated and tested.
Figure 15 summarizes the various stages of the realization of a bipolar integrated circuit in the form of a table.
The Planar process is also used in the realization of the semiconductors (diodes, transistors).
The collective operations, relating to this process and which are of physicochemical nature, deserve some comments.
The preparation of the substrate consists of the
realization of silicon plate which will be useful of mechanical stand and on
which one will establish several hundreds of identical circuits. These plates
have a diameter of about 5 to 10 centimetres
and a thickness from 200 to 300 microns.
Their surface quality must be as perfect as possible, which obliges with an
operation of polishing.
The epitaxy consists in depositing a semiconductor
layer of extrinsic conductibility (due to the doping) and thickness controlled
well, on the substrate whose these parameters import less, since it is about a
mechanical stand. The thickness of this epitaxial layer varies between 5
and 10 microns.
Thermal oxidation allows the creation of an oxide
coating silicon (a thickness of 0,5 micron)
on the epitaxial layer.
This coating authorizes a highher degree of accuracy in the following operation, the diffusion.
One realizes then, by photoengraving, of the windows, in this coating with through which the various diffusions will be carried out. Those, consequently, will be delimited perfectly.
This oxide coating can also installation to protect the junctions carried out in the epitaxial layer, in final phase.
The diffusion, we already spoke about it
in the chapter devoted to the semiconductor and extrinsic conduction.
It is a question of making diffuse, locally, a body (or impurity) in the semiconductor crystal lattice, in order to obtain the conductibility of the type P or N (according to the atomic structure of the diffused body).
The stacking of these types of conduction allows the creation of junctions, therefore of diodes or transistors.
Resistances are also carried out according to this process, at the places where one envisaged to establish them, i.e. by opening windows in oxide by photoengraving and use of masks. The range of resistances extends from 20 to 20 000 W approximately.
The condensers can be produced in two ways, either by the capacitive effect of a polarized junction in reverse (of which it was question about the diodes with variable capacity), or by interposition between two metallized zones of a dielectric material (silicon oxide). A few hundred picofarads thus is obtained.
The photoengraving is employed with each new stage
in order to carry out the windows in protective oxide.
It is about the same process as that described for the thin layers.
The vacuum metal deposit is used to place at the not
masked places of the zones able to carry out connections or connections between
the elements and on which will come to set wire of exits. The thickness of this
deposit is approximately 0,8 micron.
There too, it is about the same process as that used for the thin layers.
The whole of these various phases constitutes the collective operations.
They can comprise up to eight different maskings, each one being followed of one or more of the above mentioned phases.
These operations are carried out over 1000 to 10 000 circuits at the same time.
The last stage consists in cutting out the silicon plates (being used as support) on which has been just practiced the collective operations in as many integrated circuits (from 100 to 1000 circuits).
One thus obtains what one names of the chips. Those are then fixed on the base plate of the case, after which connections are carried out between the circuit and the pins of exit of the base plate.
Then encapsulation comes. Various cases are proposed, function of dimensions of the circuit and especially according to the number of exits.
Integration being increasingly large, the exits are increasingly numerous, consequently, the case is increasingly bulky.
These operations of connection and encapsulation are carried out on each circuit, they thus intervene largely in the cost price, to such a degree that the setting out of case costs more than the chip itself.
One will seek to decrease the number of exits per circuit by assigning to those different functions. It is the technique known as of multiplexing which consists, for example, indifferently to use four terminals as entries or exits. A fifth pin sends a binary logical signal (presence or absence of tension) which makes it possible to order the outer circular route circuits, in their indicating to which moment the four pins must be used as exits or entries.
Logic three states is applied to the peripheral circuits. It makes it possible to temporarily disconnect a certain number of those when the signals present do not relate to them.
All the cases are the subject of very strict standards as well on the dimensional level as on the technological level.
For the less complex circuits, one uses cases of transistors provided with more exits (6 or 8).
For the more important circuits, one worked out adapted cases. They are, on the one hand, the flat cases (or flat-pack) that one connects on the printed circuit by microphone-weldings. They are generally intended for aerospace or the military techniques, and in addition the plug-in cases (or dual in line) more especially designed for industry. The exits can be 64.
These two types of cases are made out of ceramics for special applications (they cost then very expensive) or out of plastic.
In following technology, you will find a collection of the various cases used in electronics.
For finishing some with the monolithic circuits concerning bipolar technology, it is necessary to speak about the insulated boxes.
Figure 16 represents the various stages of the realization of a transistor (this one is a N.P.N.). It is supposed that it belongs to an integrated circuit and that many other transistors (either N.P.N., or P.N.P) are laid out turn around.
It is obvious that one will be obliged to build dielectric barriers delimiting each one of these transistors in order to isolate them the ones from the others.
These barriers constitute small islands which one names isolated boxes.
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There are several methods to carry out this insulation which are as follows :
by junction
by process EPIC
by process ISOPLANAR.
Figure 17 represents an insulation by process ISOPLANAR.
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These insulated boxes are not only used for the active components but also for the passive components of the circuit (resistances, condensers).
As an indication, dimensions of the boxes are about 100 x 100 microns.
They are also used in the manufacture of the integrated circuits of technology MOS.
The design of the latter being somewhat different, we will devote the following chapter to it.
3. 4. 2. - MONOLITHIC INTEGRATED CIRCUITS IN TECHNOLOGY MOS
Figure 18 gives an outline of the realization of a transistor MOS channel N to enrichment.
Compared to that of the bipolar transistor, it is not simplified considerably, it does not have any more but two masks there (comparison made compared to figure 16).
Figure 19 represents the integration of the basic reverser in C-MOS (complementary MOS).
One sees there appearing a box. This one is necessary owing to the fact that the substrate of a transistor MOS channel P must be of conductibility N (see figure 18) whereas that of a channel N must be of P. conductibility.
This reverser requires for its realization less operations and its low fuel consumption at rest allows an integration much larger than for the bipolar one.
The insulated box, in this case, is about 50 x 50 microns.
Moreover, this technology does not imply the realization of passive components such as resistances, since we know that a transistor MOS whose grid is connected to the drain comprises like a resistance.
The realization of condensers is carried out according to the same principle as for the development of the grids of these transistors, the dielectric one being the oxide coating silicon.
One also draws part of the stray capacity grid-substrate (of which the value can reach 2 to 5 pF), for the realization of the registers and dynamic storages which we will approach in a forthcoming theory.
This capacity is, mainly, person in charge for the limitation of frequency of operation of these devices.
Also is it interesting to direct research towards a reduction in this capacity ?
Generally, these parasitic effects are due to the fact that these zones are inside the substrate.
If an insulating substrate is used and that on this support, one realizes, of rise, the various layers of materials, one obtains insulated small islands, each one of them representing an active component or liability isolated well from the others.
Figure 20 illustrates this process which takes the name of S.O.S. (Silicon On Sapphire : silicium sur saphir).
The reduction in the parasitic capacity, of resistances of escape, brings an increase the speed of operation in a report/ratio of about 5 to 10. Dynamic consumption is decreased too.
A new orientation is given to technology MOS.
Two major factors guide the evolution of a technology :
the speed of operation
consumption
If the frequency of operation must be highest possible, one will seek the lowest possible consumption, not by preoccupation with an economy, but to be able to integrate more functions on the same support without reaching per square millimetres, of the operating temperatures likely to deteriorate the components or to bring drifts.
Technology MOS-SOS is thus an interesting realization.
There is the different one, among them, Planox technologies, Polyplanar, Isoplanar. One of most important is the LOC MOS (Local Oxidation Complementary - MOS) whose list of the functions fulfilled in this technology becomes imposing.
We have just made a brief review with regard to the integrated circuits, this field is in continual evolution and our goal is not to describe all the technological achievements.
However, the technician must have a certain knowledge of these problems in order to as well as possible use the circuits placed at his disposal or, at the proper time, to be able to rather choose a technology than another, according to the destination of the material.
This choice is carried out, in general, according to following criteria's :
Speed of operation
Consumption
Immunity with the noise
Choice of the functions suggested by the manufacturer in technology selected.
Cost price of the operators (if it is about construction in series).
The level of integration intervenes in certain cases, because it should be known that the more integration is raised, the more one improves the reliability of the unit.
One defines reliability as being the probability so that an apparatus fulfills well its function under specified condition of uses and given lapse of time.
This is one of the major assets of integration, bus many handling are removed at the time of the realization of a material using this technique and one avoids the errors and the defects.
All the parameters associated with reliability are well defined, one can thus quantify this value and the profit brought by this use ranges between 10 and 50, which is very important because that means that apparatuses thus designed will function without failure from 10 to 50 times longer than those carried out in a traditional way.
From the manufacturer point of view, a technology has of outlet only if it makes a improvement of the cost price, performances and especially if there is reproducibility of these performances (few scraps).
In next technology, we will draw up an inventory of the logical circuits most frequently met in the industrial assemblies. It will be also presented a lexicon of the terms used in the catalogs of the manufacturers as well as the various cases used for the semiconductors and integrated circuits.
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